microvia hdi
The tiny conductive holes known as microvias play a crucial role in multilayer PCBs, enabling connections between layers that boost input/output density and functionality. These microscopic innovations are vital in meeting demanding requirements for miniaturization and reliability, but they also introduce significant challenges around precise PCB fabrication and assembly processes. To minimize these challenges and enable robust microvias, JHYPCB uses advanced materials and laser drilling to precisely create microvias. The following assembly considerations are essential for using these innovative PCB elements.
In stacked microvia hdi arrangements, there is a copper cap on the top of each via. This copper cap is plated over the microvia hole and extends down to the capture pad. The copper plate can be either bare or filled. When it is bare, the cap is exposed and provides an electrical path through the via, whereas when it is filled, the microvia hole is completely sealed. The choice of which type of copper plate to use is a key decision that impacts both design and reliability.
Stacked microvias are often fabricated through a process called planarization. This is an HDI PCB fabrication step that reduces the copper thickness and assures good conductivity between the capped microvia and copper wrap. It also eliminates the need for solder masking on top of the copper layer, which can add cost and complexity.
What are the assembly considerations for microvia hdi?
However, stacked microvias can be prone to failure under thermal cycling, especially when they are not positioned correctly and/or are too large for the PCB. The most common types of failure occur at plated interfaces, such as the interface between a stacked microvia and its capture pad, or at the knee (where the copper slopes into the top of the via).
In order to minimize these risks, it is important for the PCB designer to carefully consider the microvia aspect ratio, particularly when stacking them. Larger aspect ratios require larger drill diameters, which can increase the potential for manufacturing defects during drilling. In addition, a larger aspect ratio can cause problems during the plating and filling steps due to different coefficients of thermal expansion between copper and substrate.
In early 2019, IPC issued a reliability warning regarding these issues, prompting fabricators to limit the use of large microvias in stacked arrangements. Achieving a suitable aspect ratio requires proper PCB design and careful fabrication by a skilled HDI manufacturer. The best way to avoid these issues is by staggered placement of vias in thinner dielectric layers, or by using skip vias where possible. This can help to keep the overall aspect ratio low while ensuring that they are safe for fab and assembly. By adhering to these assembly considerations, you can successfully deploy microvias in your next project.
